A Device Independent High Grade Implementation of AESon Xilinx FPGA'S
الكلمات المفتاحية:
.الملخص
The paper proposes a way for the implementation the Advanced Encryption Standard (AES), by matching the algorithm requirements with the hardware (specifically the Xilinx FPGA's) requirements. The aim from the new proposal was an implementation that is not restricted to a particular device. Instead a one guided by the customer requirements, that’s to say transforming the AES architecture to general purpose tool. Finally, a comparison of the proposed implementation with other implementation of the AES using FPGA was made and assessed. The results clearly demonstrate the efficiency of the proposed implementation.
التنزيلات
Key Dates
منشور
2005-06-01
إصدار
القسم
Articles
الرخصة
هذا العمل مرخص بموجب Creative Commons Attribution 4.0 International License.
The Journal of Engineering and Sustainable Development is an open-access journal that all contents are free of charge. Articles of this journal are licensed under the terms of the Creative Commons Attribution International Public License CC-BY 4.0 (https://creativecommons.org/licenses/by/4.0/legalcode) that licensees are unrestrictly allowed to search, download, share, distribute, print, or link to the full texts of the articles, crawl them for indexing and reproduce any medium of the articles provided that they give the author(s) proper credits (citation). The journal allows the author(s) to retain the copyright of their published article.
Creative Commons-Attribution (BY) 
كيفية الاقتباس
A Device Independent High Grade Implementation of AESon Xilinx FPGA’S. (2005). مجلة الهندسة والتنمية المستدامة, 9(2), 70-81. https://jeasd.uomustansiriyah.edu.iq/index.php/jeasd/article/view/1852
