A Device Independent High Grade Implementation of AESon Xilinx FPGA'S

Authors

  • Siddeeq Y. Ameen Computers & Information Technology Eng. Dept., University of Technology, Baghdad, Iraq Author
  • Dhafer R. Zaghar Computer & Software Eng. Dept., College of Eng., Al-Mustansiriya University, Baghdad, Iraq Author
  • Muayed S. Al-Huseiny Computer & Software Eng. Dept., College of Eng., Al-Mustansiriya University, Baghdad, Iraq Author

Keywords:

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Abstract

The paper proposes a way for the implementation the Advanced Encryption Standard (AES), by matching the algorithm requirements with the hardware (specifically the Xilinx FPGA's) requirements. The aim from the new proposal was an implementation that is not restricted to a particular device. Instead a one guided by the customer requirements, that’s to say transforming the AES architecture to general purpose tool. Finally, a comparison of the proposed implementation with other implementation of the AES using FPGA was made and assessed. The results clearly demonstrate the efficiency of the proposed implementation.

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Key Dates

Published

2005-06-01

Issue

Vol. 9 No. 2 (2005): Journal of Engineering and Development

Section

Articles

License

Creative Commons License

This work is licensed under a Creative Commons Attribution 4.0 International License.

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How to Cite

A Device Independent High Grade Implementation of AESon Xilinx FPGA’S. (2005). Journal of Engineering and Sustainable Development, 9(2), 70-81. https://jeasd.uomustansiriyah.edu.iq/index.php/jeasd/article/view/1852