Implementation of Reed-Solomon Encoder/Decoder Using Field Programmable Gate Array
الكلمات المفتاحية:
.الملخص
In this paper, (15, 11) and (255, 239) Reed-Solomon codes have been designed and Implemented using ALTERA Field Programmable Gate Array (FPGA) device. The design is carried out by writing VHDL modules for different encoder and decoder components. The waveforms are tested using the package MODEL-SIM 5.4a. While synthesis reports and board programming file are obtained using the package QUARTUS II. ALTERA-FLEX10K10 FPGA board is used as a target device for the designed Reed-Solomon encoder/decoder. Simulation waveforms show that (15, 11) and (255,239) Reed-Solomon decoders could correct up to 2 and 8 erroneous symbols respectively
التنزيلات
Key Dates
منشور
2006-09-01
إصدار
القسم
Articles
الرخصة
هذا العمل مرخص بموجب Creative Commons Attribution 4.0 International License.
The Journal of Engineering and Sustainable Development is an open-access journal that all contents are free of charge. Articles of this journal are licensed under the terms of the Creative Commons Attribution International Public License CC-BY 4.0 (https://creativecommons.org/licenses/by/4.0/legalcode) that licensees are unrestrictly allowed to search, download, share, distribute, print, or link to the full texts of the articles, crawl them for indexing and reproduce any medium of the articles provided that they give the author(s) proper credits (citation). The journal allows the author(s) to retain the copyright of their published article.
Creative Commons-Attribution (BY) 
كيفية الاقتباس
N. Abdullah, H. . (2006). Implementation of Reed-Solomon Encoder/Decoder Using Field Programmable Gate Array. مجلة الهندسة والتنمية المستدامة, 10(3), 104-114. https://jeasd.uomustansiriyah.edu.iq/index.php/jeasd/article/view/1792
